The present invention relates to techniques for correcting errors, and more particularly to techniques for generating bit reliability information.
When a data sequence is read from a magnetic hard disk using a hard disk drive, the data sequence can be estimated by running the signal samples at the output of the channel through a Viterbi detector. A Viterbi detector uses the principles of dynamic programming to find the most likely data sequence given a sequence of noisy observations of the channel.
Errors in the Viterbi detector output are most commonly isolated bits. However, the physical properties of the magnetic recording system make short bursts of errors reasonably common. These error events are sometimes described using ‘+’, ‘−’ and “0” characters. A “+” character represents a recorded binary zero detected as a one. A “−” character represents a recorded binary one detected as a zero. A “0” character represents a bit that is detected correctly. Thus, a +−+ error event might occur if a recorded pattern 001011 were detected as 010111, and a −0− error event might occur if 011101 were detected as 001001.
The Viterbi detected sequence can be improved (i.e., the number of errors in it can be reduced) by incorporating linear block code parity constraints and/or more accurate (longer) target response. However, these improvements come with an exponential increase in the complexity of the Viterbi detector. Instead of incorporating linear block code parity constraints and/or longer or better target response into the Viterbi detector itself, it is frequently more efficient to construct a separate parity post-processor that acts on the output of a Viterbi detector. A parity post-processor (PPP) is a signal processing module. A parity post-processor can, for example, be added to a Viterbi detector to enforce a parity code constraints and/or to re-compute more accurate metric values than the ones used by the Viterbi detector.
However, many error correction systems that contain a Viterbi detector and a parity post-processor do not provide a sufficient amount of protection against error events, and in particular do not provide high quality bit reliability information. Therefore, it would be desirable to provide an error correction system that can provide more robust techniques for correcting errors in data sequences and high quality bit reliability information.